Comparison of Make and Speedy Make
- Speedy Make uses XML.
- Make uses its own format, where tabs are significant.
- Speedy Make knows dependencies by parsing sources file and extracting
Sometime, only the main source file of a whole project is required in
- Make requires explicit definition of dependencies: for each file to
build, the list of required files must be given in the form:
objectfile: source1 source2 source3 etc...
cc $@ $<
This is followed by the list of commands to perform. Each command stays
on a line that starts with a tab code.
- Both make and Speedy Make use the date of last modification of the
files to know whichever must be compiled. And the included headers also.
- Speedy Make uses variable prefixed by $ for a global replacement and
* for an iterative replacement. It allows also to add a replacing extension
in square brackets.
- Make uses variable defined in the makefile or the automatic variables
$@ and $<.
Overriding of variables
- Both make and Speedy Make allow to override variables at command line.
- Speedy Make has options recognized by the interpreter for main tasks.
It is also possible to select an action at command line.
- Make requires multiple definitions of processing in the makefile for
various tasks. They may be choosen at command line.
Compiling and linking
- Both make and Speedy Make call external programs, with options given
in the makefile.
- This is planned in Speedy Make.
- Make must be called after another program named "configure",
that uses its own definition file (very hard to write).